1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device package and a semiconductor device package manufactured thereby, and more specifically to a method for manufacturing a PGA (pin grid array) type semiconductor device package, and a PGA type semiconductor device package manufactured thereby.
2. Description of Related Art
Conventional PGA type semiconductor device packages include a ceramic substrate having an upper surface and a bottom surface. A recess for supporting a semiconductor chip is defined at a center region of the upper surface of the ceramic substrate, and a plurality of patterned metallized conductors are formed in the inside of the ceramic substrate to extend from a periphery of the recess to a side surface of the ceramic substrate. On the other hand, a plurality of metallized pads are formed on the bottom surface of the ceramic substrate. Each of the metallized pads is electrically connected through a conducting through hole formed in the ceramic substrate, to a land formed in a middle portion of a corresponding patterned metallized conductor.
In addition, the ceramic substrate has an electroplating electrode provided on the side surface of the ceramic substrate so that the patterned metallized conductors are electrically connected to at their outer end (substrate side surface end) of the electroplating electrode. In this condition, the patterned metallized conductors electrically short-circuited to the electroplating electrode are electrically connected to one another. An extension from the land of each patterned metallized conductor to an outer end of the patterned metallized conductor electrically connected to the electroplating electrode can be called a "plating lead wire".
Now, a process for manufacturing a semiconductor device package by using the above mentioned ceramic substrate will be described. However, a manufactured process portion having no direct relation to the present invention will be omitted for simplification of explanation, and therefore, a process after a sintering process will be described in the following.
Firstly, by applying a voltage to the electroplating electrode formed on the side surface of the ceramic substrate so that the voltage is applied to all the metallized pads through the corresponding "plating lead wires" and the corresponding conducting through holes, nickel is deposited on each of the metallized pads by means of an electroplating. Then, a lead pin is bonded to each nickel-plated metallized pad by a silver/copper solder material, so that a plurality of lead pins soldered to the metallized pads on the bottom surface of the ceramic substrate stand perpendicularly to the bottom surface of the ceramic substrate. Thereafter, nickel/cobalt alloy and gold are deposited by means of an electroplating. Finally, the electroplating electrode is removed by means of grinding, so that the patterned metallized conductors are electrically and mechanically separated from one another. Thus, a PGA type semiconductor device package is completed.
In the semiconductor device package manufactured by the above mentioned process using the above mentioned ceramic substrate, each patterned metallized conductor extends to the side surface of the ceramic substrate so as to form a "plating lead wire" connected to the electroplating electrode provided on the side surface of the ceramic substrate, so that the electroplating is performed by applying a voltage through the electroplating electrode and the "plating lead wire". However, the "plating lead wire", which is an extension from the land of each patterned metallized conductor, will increase a stray capacity between wiring conductors. This becomes a cause for a signal crosstalk or a noise generation in a high frequency operation of the integrated circuit. Namely, the characteristics of the semiconductor integrated circuit is deteriorated.